//找8bit最高位为1的位数
module top1(
           input [7: 0] x,
           output [2: 0] y
       );

wire [3: 0] data_a;
wire [1: 0] data_b;

assign y[2] = | x[7: 4];
assign data_a = y[2] ? x[7 : 4] : x[3 : 0];
assign y[1] = | data_a[3: 2];
assign data_b = y[1] ? data_a[3 : 2] : data_a[1 : 0];
assign y[0] = data_b[1];

endmodule
